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DTSTART;TZID=Europe/Amsterdam:20240521T180000
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SUMMARY:Panel 1: Wine and Cheese Panel
CREATED:20240313T095846Z
DTSTAMP:20240313T095846Z
URL:https://ets24.ewi.tudelft.nl/index.php/home/program/conference-program/wine-and-cheese-panel
DESCRIPTION:Wine and Cheese Panel: The ETS Roadmap - Ask the Experts \NOrganizer and Moderator: Haralampos Stratigopoulos, Sorbonne Universités, CNRS, LIP6 Laboratory, Paris, FR\NAbstract: We’ll continue our tradition of tapping the collective expertise of the ETS participants by hosting an interactive “Ask The Experts” session during the Wine and Cheese Panel. The twist is that anyone can ask a question and everyone has the chance to be the expert who answers it (or contests the answer of another expert). The general theme this year is “The ETS Roadmap”, but anything goes. Prizes will be awarded for best question, best answer, and best rebuttal.\NShort Bio: Haralampos-G. Stratigopoulos received the diploma degree in electrical and computer engineering from the National Technical University of Athens, Athens, Greece, in 2001, and the PhD degree in electrical engineering from Yale University, USA, in 2006. He is a Research Director with the French National Center for Scientific Research (CNRS) at the LIP6 Laboratory of Sorbonne Université, Paris, France. His main research interests include hardware security, neuromorphic computing, and design-for-test of integrated circuits and systems. He was the general chair of the 2015 IEEE International Mixed-Signal Testing Workshop (IMSTW) and the 2021, 2022 and 2023 AI Hardware: Test, Reliability and Security (AI-TREATS) Workshop and the program chair of the 2017 IEEE European Test Symposium (ETS). He has served on the Technical Program Committees for the Design, Automation, and Test in Europe Conference (DATE), Design Automation Conference (DAC), IEEE International Conference on Computer-Aided Design (ICCAD), IEEE European Test Symposium (ETS), IEEE International Test Conference (ITC), IEEE VLSI Test Symposium (VTS), and several others international conferences. He has also served as an associate editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems—I: Regular Papers, IEEE Design and Test, and Journal of Electronic Testing: Theory and Applications (Springer).
X-ALT-DESC;FMTTYPE=text/html:<h2 style="text-align: justify;">Wine and Cheese Panel: The ETS Roadmap - Ask the Experts </h2><p style="text-align: justify;"><strong>Organizer and Moderator:</strong> Haralampos Stratigopoulos, Sorbonne Universités, CNRS, LIP6 Laboratory, Paris, FR</p><p style="text-align: justify;"><strong>Abstract</strong>: We’ll continue our tradition of tapping the collective expertise of the ETS participants by hosting an interactive “Ask The Experts” session during the Wine and Cheese Panel. The twist is that anyone can ask a question and everyone has the chance to be the expert who answers it (or contests the answer of another expert). The general theme this year is “The ETS Roadmap”, but anything goes. Prizes will be awarded for best question, best answer, and best rebuttal.</p><p style="text-align: justify;"><strong>Short Bio: </strong>Haralampos-G. Stratigopoulos received the diploma degree in electrical and computer engineering from the National Technical University of Athens, Athens, Greece, in 2001, and the PhD degree in electrical engineering from Yale University, USA, in 2006. He is a Research Director with the French National Center for Scientific Research (CNRS) at the LIP6 Laboratory of Sorbonne Université, Paris, France. His main research interests include hardware security, neuromorphic computing, and design-for-test of integrated circuits and systems. He was the general chair of the 2015 IEEE International Mixed-Signal Testing Workshop (IMSTW) and the 2021, 2022 and 2023 AI Hardware: Test, Reliability and Security (AI-TREATS) Workshop and the program chair of the 2017 IEEE European Test Symposium (ETS). He has served on the Technical Program Committees for the Design, Automation, and Test in Europe Conference (DATE), Design Automation Conference (DAC), IEEE International Conference on Computer-Aided Design (ICCAD), IEEE European Test Symposium (ETS), IEEE International Test Conference (ITC), IEEE VLSI Test Symposium (VTS), and several others international conferences. He has also served as an associate editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems—I: Regular Papers, IEEE Design and Test, and Journal of Electronic Testing: Theory and Applications (Springer).</p>
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DTSTART;TZID=Europe/Amsterdam:20240522T140000
DTEND;TZID=Europe/Amsterdam:20240522T153000
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SUMMARY:Panel 2
CREATED:20240313T095955Z
DTSTAMP:20240313T095955Z
URL:https://ets24.ewi.tudelft.nl/index.php/home/program/conference-program/panel-on-need-of-indutrial-data-nxp
DESCRIPTION:Collaboration between Academia and Industry: How Healthy is it?\NModerator: Said Hamdioui (TU Delft, The Netherlands) – S.Hamdioui@tudelft.nl\NPanelists:\NLeticia Poehls (RWTH Aachen, Germany) – Poehls@ids.rwth-aachen.de\NIlia Polian (University of Stuttgart, Germany) – Ilia.Polian@informatik.uni-stuttgart.de\NJo Gunnes (NXP Semiconductors, The Netherlands) – Jo.Gunnes@nxp.com\NYervant Zorian (Synopsys, USA) – Yervant.Zorian@synopsys.com\NIndustrial Panelist – To be Announced\NOrganizer:\NGuilherme Medeiros (NXP Semiconductors, The Netherlands) – Guilherme.CardosoMedeiros@nxp.com\NAbstract:\NThis panel will explore the dynamics in academia-industry collaboration, addressing the constraints of each party and how they ultimately impact fruitful partnerships. A focal point of discussion will be the significant obstacles posed by the publication of industrial data, which frequently becomes a deal-breaker in the partnership; we will explore its correlation with shifting company strategies, such as increased data protection measures and reduced spending on research. The panel will then discuss how the lack of consolidated academia-industry collaborations negatively impacts the independence of academic researchers, but also innovative industry development. We will analyze possible joint strategies and potential solutions, and reflect on different paths forward that can benefit both academia and industry.\N \NBiographies:\NLeticia Maria Bolzani Poehls graduated in Computer Science at the Federal University of Pelotas (UFPel), Brazil in 2001. In the year 2004, she received her M.Sc. Degree in Electrical Engineering at Pontifical Catholic University of Rio Grande do Sul (PUCRS), Brazil, and in 2008 her Ph.D. in Computer Engineering from the Politecnico di Torino, Italy. From 2010 to 2022 she was Professor of the School of Technology PUCRS. Currently, she is leading the Research Group of Test and Reliability of Emerging Applications at the Chair of Integrated Digital Systems, RWTH Aachen University, Germany. She is member of the Steering Committee for the IEEE LATS and BELAS. Finally, she received the 2021 JETTA-TTTC Best Paper Award, the IEEE Latin American Test Symposium (LATS2022) Best Paper Award and the HiPEAC 2023 Paper Award for the paper at Design Automation Conference (DAC2023).\NJo Gunnes received his M. Sc. degree from Norwegian University of Science and Technology, Trondheim, Norway, in de field of Delay Fault Testing. He is currently a Principal DfT Architect with NXP Semiconductors, Nijmegen, the Netherlands. His current interests include latent defect screening, analogue defect based testing and overall architecture for efficient production testing with high screening quality.\NIlia Polian is a Full Professor and the Director of the Institute for Computer Architecture and Computer Engineering at the University of Stuttgart, Germany. He received his Diplom (MSc) and PhD degrees from the University of Freiburg, Germany, in 1999 and 2003, respectively. Prof. Polian co-authored over 200 scientific publications and received two Best Paper Awards. He is a Senior Member of IEEE. Prof. Polian is the Speaker of DFG’s Priority Program 2253 “Nano Security” and a Director of Graduate School “Intelligent Methods for Test and Reliability” in Stuttgart (funded by Advantest). His scientific interests include hardware-oriented security, emerging architectures, test methods, and quantum computing.\NDr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founding chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and the 50th International Test Conference (ITC). He founded several other IEEE symposia and workshops. Dr. Zorian holds 45 US patents, has authored five books, published over 400 refereed papers and received numerous best paper awards. He is an IEEE fellow since 1999. He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.\N \N 
X-ALT-DESC;FMTTYPE=text/html:<h1>Collaboration between Academia and Industry: How Healthy is it?</h1><p><strong>Moderator:</strong> Said Hamdioui (TU Delft, The Netherlands) – <a href="mailto:S.Hamdioui@tudelft.nl">S.Hamdioui@tudelft.nl</a></p><p><strong>Panelists:</strong></p><p>Leticia Poehls (RWTH Aachen, Germany) – <a href="mailto:Poehls@ids.rwth-aachen.de">Poehls@ids.rwth-aachen.de</a></p><p>Ilia Polian (University of Stuttgart, Germany) – <a href="mailto:Ilia.Polian@informatik.uni-stuttgart.de">Ilia.Polian@informatik.uni-stuttgart.de</a></p><p>Jo Gunnes (NXP Semiconductors, The Netherlands) – <a href="mailto:Jo.Gunnes@nxp.com">Jo.Gunnes@nxp.com</a></p><p>Yervant Zorian (Synopsys, USA) – <a href="mailto:Yervant.Zorian@synopsys.com">Yervant.Zorian@synopsys.com</a></p><p>Industrial Panelist – To be Announced</p><p><strong>Organizer:</strong></p><p>Guilherme Medeiros (NXP Semiconductors, The Netherlands) – <a href="mailto:Guilherme.CardosoMedeiros@nxp.com">Guilherme.CardosoMedeiros@nxp.com</a></p><p><strong>Abstract:</strong></p><p>This panel will explore the dynamics in academia-industry collaboration, addressing the constraints of each party and how they ultimately impact fruitful partnerships. A focal point of discussion will be the significant obstacles posed by the publication of industrial data, which frequently becomes a deal-breaker in the partnership; we will explore its correlation with shifting company strategies, such as increased data protection measures and reduced spending on research. The panel will then discuss how the lack of consolidated academia-industry collaborations negatively impacts the independence of academic researchers, but also innovative industry development. We will analyze possible<strong> </strong>joint strategies and potential solutions, and reflect on different<strong> </strong>paths forward that can benefit both academia and industry.</p><p> </p><p><strong>Biographies:</strong></p><p><span style="color: black;"><strong>Leticia Maria Bolzani Poehls</strong> graduated in Computer Science at the Federal University of Pelotas (UFPel), Brazil in 2001. In the year 2004, she received her M.Sc. Degree in Electrical Engineering at Pontifical Catholic University of Rio Grande do Sul (PUCRS), Brazil, and in 2008 her Ph.D. in Computer Engineering from the Politecnico di Torino, Italy. From 2010 to 2022 she was Professor of the School of Technology PUCRS. Currently, she is leading the Research Group of Test and Reliability of Emerging Applications at the Chair of Integrated Digital Systems, RWTH Aachen University, Germany. She is member of the Steering Committee for the IEEE LATS and BELAS. Finally, she received the 2021 JETTA-TTTC Best Paper Award, the IEEE Latin American Test Symposium (LATS2022) Best Paper Award and the HiPEAC 2023 Paper Award for the paper at Design Automation Conference (DAC2023).</span></p><p><span style="color: black;"><strong>Jo Gunnes</strong> received his M. Sc. degree from Norwegian University of Science and Technology, Trondheim, Norway, in de field of Delay Fault Testing. He is currently a Principal DfT Architect with NXP Semiconductors, Nijmegen, the Netherlands. His current interests include latent defect screening, analogue defect based testing and overall architecture for efficient production testing with high screening quality.</span></p><p><span style="color: black;"><strong>Ilia Polian</strong> is a Full Professor and the Director of the Institute for Computer Architecture and Computer Engineering at the University of Stuttgart, Germany. He received his Diplom (MSc) and PhD degrees from the University of Freiburg, Germany, in 1999 and 2003, respectively. Prof. Polian co-authored over 200 scientific publications and received two Best Paper Awards. He is a Senior Member of IEEE. Prof. Polian is the Speaker of DFG’s Priority Program 2253 “Nano Security” and a Director of Graduate School “Intelligent Methods for Test and Reliability” in Stuttgart (funded by Advantest). His scientific interests include hardware-oriented security, emerging architectures, test methods, and quantum computing.</span></p><p><span style="color: black;">Dr. <strong>Yervant Zorian</strong> is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founding chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and the 50th International Test Conference (ITC). He founded several other IEEE symposia and workshops. Dr. Zorian holds 45 US patents, has authored five books, published over 400 refereed papers and received numerous best paper awards. He is an IEEE fellow since 1999. He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.</span></p><p> </p><p> </p>
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